19.5 Three-dimensional 128Gb MLC vertical NAND Flash-memory with 24-WL stacked layers and 50MB/s high-speed programming

TLDR

Recent advances in 3D NAND Flash have demonstrated feasibility and chip implementation, yet scaling challenges and rising manufacturing costs from quadruple patterning and EUV lithography drive the need for next‑generation nodes beyond 16 nm. This work introduces a cost‑effective, highly scalable 3D 128 Gb 2‑bit‑per‑cell vertical‑NAND flash memory. The device is realized as a true 3D 128 Gb 2‑bit‑per‑cell vertical‑NAND architecture, enabling lower manufacturing cost and improved scalability. The chip delivers 50 MB/s write throughput at 3 K endurance for embedded use, and 33 MB/s write throughput at 35 K endurance for data‑center and enterprise SSDs.

Abstract

In the past few years, various 3D NAND Flash memories have been demonstrated, from device feasibility to chip implementation, to overcome scaling challenges in conventional planar NAND Flash [1-3]. The difficulties include shrinking the NAND cell and increasing manufacturing costs due to quadruple patterning and extreme ultraviolet lithography, motivating the development of the next-generation node beyond 16nm-class NAND Flash [4]. In this paper, as a new 3D memory device with lower manufacturing cost and superior device scalability, we present a true 3D 128Gb 2b/cell vertical-NAND (V-NAND) Flash. The chip accomplishes 50MB/s write throughput with 3K endurance for typical embedded applications such as mobile and personal computer. Also, extended endurance of 35K is achieved with 33MB/s of write throughput for data center and enterprise SSD applications.