2002 · 19 citations · 3 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureEmbedded SystemsLow-power DesignClock Distribution NetworksCmos Circuit DesignData CompressionDigital Signal ProcessingLow-power Digital Circuit DesignClock Power DissipationDigital Signal Processing Block ArchitectureDynamic Power DissipationEncoder DesignEnergy-efficient Multimedia ProcessingPipeline ArchitecturePower-efficient DesignSimd Architectures
VDSP2 is a DSP for the MPEG2 algorithm which employs 0.5 /spl mu/m triple-layer-metal CMOS technology. By using this DSP, a real-time encoder and decoder specified in MPEG2 have been realized with two VDSP2s and a ME unit, and a VDSP2, respectively, at 80 MHz clock rate.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
3
A real time P*64/MPEG video encoder chip
Supreeth Krishna Rao, M. Hatamian, Matt Uyttendaele et al. · 1993 · 37 citations