2022 Design, Automation & Test in Europe Conference & Exhibition (DATE) · 2022 · 23 citations · 7 references
EngineeringMachine LearningAdvanced ComputingHardware AlgorithmComputer ArchitectureData ScienceHigh-performance ArchitectureParallel ComputingMapping StrategyComputer EngineeringComputer ScienceDomain-aware Genetic AlgorithmDeep LearningNeural Architecture SearchHw Resource ConfigurationHardware AccelerationEdge ComputingDomain-specific AcceleratorDnn AcceleratorsResource Optimization
The design of DNN accelerators includes two key parts: HW resource configuration and mapping strategy. Intensive research has been conducted to optimize each of them independently. Unfortunately, optimizing for both together is extremely challenging due to the extremely large cross-coupled search space. To address this, in this paper, we propose a HW-Mapping co-optimization framework, an efficient encoding of the immense design space constructed by HW and Mapping, and a domain-aware genetic algorithm, named DiGamma, with specialized operators for improving search efficiency. We evaluate DiGamma with seven popular DNNs models with different properties. Our evaluations show DiGamma can achieve (geomean) 3.0x and 10.0x speedup, comparing to the best-performing baseline optimization algorithms, in edge and cloud settings.
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Yu‐Hsin Chen, Joel Emer, Vivienne Sze · ACM SIGARCH Computer Architecture News · 2016 · 1.2K citations
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A graph placement methodology for fast chip design
Azalia Mirhoseini, Anna Goldie, Mustafa Ege Yazgan et al. · Nature · 2021 · 531 citations
Graph Placement Methodology, Physical Design (Electronics), Engineering +7