Neuromorphic Implementation of Logic Functions Based on Parallel Dual-Gate Thin-Film Transistors

Abstract

Composed of computation units each containing a parallel, dual-gate (DG) thin-film transistor (TFT) and a memory capacitor addressed by an access TFT, a neuromorphic circuit implementing fundamental AND and OR logic functions is realized and characterized. The exceptionally low leakage current of a TFT built on indium-gallium-zinc oxide (IGZO) allows the capacitor to be used as a quasi-static memory element. Appropriate weight signals for the realization of the two logic functions are obtained using a gradient-descent training algorithm. The circuit can be configured to execute one of the two functions by the setting of the weight signals.