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Recessed-Gate Ga₂O₃-on-SiC MOSFETs Demonstrating a Stable Power Figure of Merit of 100 mW/cm² Up to 200 °C

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Citations

28

References

2022

Year

Abstract

Recessed-gate <inline-formula> <tex-math notation="LaTeX">$\beta $ </tex-math></inline-formula>-gallium oxide (Ga<sub>2</sub>O<sub>3</sub>) MOSFETs on the heterogeneous Ga<sub>2</sub>O<sub>3</sub>-on-SiC (GaOSiC) wafer are fabricated and characterized. The GaOSiC transistors with an <inline-formula> <tex-math notation="LaTeX">${L}_{\mathrm {SD}}$ </tex-math></inline-formula> of <inline-formula> <tex-math notation="LaTeX">$11~{\mu } \text{m}$ </tex-math></inline-formula> exhibit the decent and stable electrical characteristics with the temperature varying from 25 &#x00B0;C to 200 &#x00B0;C, including a breakdown voltage (<inline-formula> <tex-math notation="LaTeX">${V}_{\mathrm {br}}$ </tex-math></inline-formula>) of 1000 V, a specific ON-resistance (<inline-formula> <tex-math notation="LaTeX">${R}_{\mathrm{\scriptscriptstyle ON},\mathrm {sp}}$ </tex-math></inline-formula>) of &#x007E;100 m <inline-formula> <tex-math notation="LaTeX">${\Omega }~\cdot $ </tex-math></inline-formula> cm<sup>2</sup>, a drive current of 91 mA/mm, and a power figure of merit (P-FOM) of &#x007E;100 MW/cm<sup>2</sup>. Characterization of the transfer length method (TLM) structure fabricated on the same heterogeneous wafer demonstrates that the reduced transfer length (<inline-formula> <tex-math notation="LaTeX">${L}_{T}$ </tex-math></inline-formula>) at the <inline-formula> <tex-math notation="LaTeX">$\beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub>/Ti/Au contact interface compensates for the increased sheet resistance (<inline-formula> <tex-math notation="LaTeX">${R}_{\mathrm {SH}}$ </tex-math></inline-formula>) of <inline-formula> <tex-math notation="LaTeX">$\beta $ </tex-math></inline-formula>-Ga<sub>2</sub>O<sub>3</sub> film at the elevated temperature, which leads to the stable electrical performance of the GaOSiC devices.

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