High-Performance Operation and Solder Reflow Compatibility in BEOL-Integrated 16-kb HfO₂: Si-Based 1T-1C FeRAM Arrays

Abstract

16-kb 1T-1C ferroelectric random access memory (FeRAM) arrays are demonstrated for 130-nm node technology with TiN/HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> :Si/TiN ferroelectric capacitors integrated into the back-end-of-line (BEOL). The 0- and 1-state distributions measured on the arrays demonstrate perfect yield at 4.8-V operation, with extrapolations suggesting that the memory window (MW) is still open at six-sigma statistics. A programming speed down to 4 ns at 4 V is highlighted at the array level, together with an endurance up to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{{7}}$ </tex-math></inline-formula> cycles. Promising data retention up to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{{4}}$ </tex-math></inline-formula> s at 125 °C is measured on the arrays and, for the first time, solder reflow compatibility is demonstrated for HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -based FeRAM. The MW on 16-kb arrays remains open when using a 2.5-V programming voltage and when the capacitor area is decreased from 0.36 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}^{{2}}$ </tex-math></inline-formula> down to 0.16 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}^{{2}}$ </tex-math></inline-formula> , with a calculated programming energy lower than 100 fJ/bit. These results pave the way to competitive ultralow-power embedded nonvolatile memories (NVM) at more advanced nodes.