Investigation and On-Board Detection of Gate-Open Failure in SiC MOSFETs

Abstract

Gate-open failures in power semiconductors occur when the gate-bond wire cracks or lifts-off leading to loss of gate control. In molded discrete devices, this failure mode may occur intermittently making it very challenging to analyze and detect. In this article, intermittent gate-open failures are comprehensively investigated in the context of discrete silicon carbide (SiC) <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s. First, the <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> 's behavior under various possible gate-open failure scenarios is analyzed in detail through simulations. Several SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s are aged on a dc power cycling setup and gate-open failure mechanism is verified through systematic multistep failure analysis, which includes on-board characterization, nondestructive C-SAM analysis, decapsulation, and optical inspection followed by scanning electron microscopy analysis of the failed devices. To understand the potential mechanism behind gate-open failure in SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s, thermo-mechanical finite element analysis analysis is performed on a high-fidelity model that shows interfacial shear stress at gate-bond. Furthermore, a robust on-board technique for reliable cycle-by-cycle detection of gate-open faults is proposed. The proposed technique is experimentally verified for all possible fault scenarios and shown to detect faults in as low as <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\text{150}\;\text{ns}$</tex-math></inline-formula> . It is shown that compared to the traditional DESAT protection scheme, the proposed mechanism can prevent potential shoot-through events that may be caused by gate-open failure.