2021 · 18 citations · 13 references
EngineeringComputer EngineeringComputer ScienceField-programmable Gate ArraysMachine LearningReconfigurable ComputingAccelerator ArchitectureDeep LearningFpga ArchitectureHardware AccelerationLow-power Fpga DesignSpiking Neural NetworksConvolutional Neural NetworksConvolutional Spiking Neural NetworksDeep Learning AccelerationEnergy-efficient AccelerationEnergy-efficient Hardware AccelerationField-programmable Gate Array AcceleratorsMultiply-accumulate UnitsPower-efficient Accelerator Design
Spiking neural networks (SNN) with their ‘integrate and fire’ (I&F) neurons replace the hardware-intensive multiply-accumulate (MAC) operations in convolutional neural networks (CNN) with accumulate operations — not only making it easy to implement on FPGAs but also opening up the opportunities for energy-efficient hardware acceleration. In this paper, we propose DeepFire — the high-performance RTL IP — for accelerating convolutional SNN inference. The IP exploits various resources available on modern FPGAs, and it outperforms existing SNN implementations by more than 10× in terms of both frame per second (FPS) and performance per watt (FPS/Watt). Our design achieves up to 40.1kFPS and 28.3kFPS on MNIST and CIFAR-10/SVHN datasets with 99.14% and 81.8%/93.1% accuracies respectively. IP was evaluated with 7-series and Ultrascale+ FPGAs from Xilinx achieving Fmax of 375MHz and 500MHz respectively.
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Loihi: A Neuromorphic Manycore Processor with On-Chip Learning
Mike Davies, Narayan Srinivasa, Tsung-Han Lin et al. · IEEE Micro · 2018 · 3.7K citations
Engineering, Computer Engineering, Computational Neuroscience +16