A 1.25-GHz Fully Integrated DC–DC Converter Using Electromagnetically Coupled Class-D <i>LC</i> Oscillators

Abstract

Fully integrated power management circuits are promising candidates to provide small form factors and meet high power density demand of modern computing platforms. This article presents a new fully integrated dc–dc converter topology based on electromagnetically coupled class-D <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LC</i> oscillators that enables up to 2.5 GHz switching frequency, allowing aggressive scaling of the on-chip passives. On-chip transformers and flying capacitors are designed to electromagnetically couple the two oscillators, and gigahertz-range switching frequency is achieved by the quasi-adiabatic switching of the parasitic capacitors. The proposed converter is implemented in a 0.18- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS process occupying 1.61 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> for 7.8 nH inductance (high efficiency version) and 0.37 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> for 3.1 nH (high power density version), achieving 1 W/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> peak power density. This work also proposes a duty-cycling scheme that improves the efficiency under light loads, which stays close to the peak from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4~\mu \text{W}$ </tex-math></inline-formula> up to 0.5 W, and in continuous operation mode the output voltage ripple is 12 mV without attaching any output capacitor thanks to the four-phase electromagnetic power delivery scheme.