Impact of Charge Trapping On Epitaxial p-Ge_-on-p-Si and HfO₂ Based Al/HfO₂/p-Ge_-on-p-Si/Al Structures Using Kelvin Probe Force Microscopy and Constant Voltage Stress

Abstract

The quest for the high speed, low power digital logic circuits urge an imperative demand of compatible high-κ dielectric integration on novel Germanium (Ge) based channel material. Here, first ever a methodical nanoscopic and microscopic probes were attempted to Atomic Layer Deposited, Hafnium Dioxide (HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) dielectrics on Molecular Beam Epitaxy (MBE) of p-Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-on-</sub> p-Si stack. Kelvin Probe Force Microscopy based contact potential difference (CPD) analysis reveals that the disintegration of trapped charges lasting for ~18 hours. The impact of constant voltage stress (CVS) on trapped charges results in variation of threshold voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> ) and hysteresis window (W) were studied. The cyclic Capacitance-Voltage (C-V) characteristics at 0.5 MHz exhibit the shift in the flat band (ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">fb</sub> ), ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> , and ΔW at 10V stress were ~0.84V, ~0.62V, and ~0.47V, respectively. While the computed interface trap density (D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</sub> ) and total effective charge density (Q <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">eff</sub> ) were ~8.49 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> eV <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> and ~1.81 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">,</sub> respectively. The gate leakage current density, (J) at 5V is 26.53 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-6</sup> A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and reduced by a factor of ~6.8 after 10V, CVS. Whereas the current density (J) increases from ~26.53 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-6</sup> A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> at 25 °C by a factor of ~2 at 125 °C. To study the retention and effect of charge trapping, the stress-time analysis was performed for 8000s at 3V (CVS). The r.m.s. surface roughness of HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> thin films was found to be ~0.23 nm. X-ray photoelectron spectroscopy (XPS) depth profiling categorized the elemental composition of thin films. These investigations would help to HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /p-Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-on-</sub> p-Si system interfacial engineering well before the Ge based nano device realization.