Publication | Closed Access
A low-swing crossbar and link generator for low-power networks-on-chip
10
Citations
14
References
2011
Year
Unknown Venue
EngineeringComputer ArchitectureInterconnection Network ArchitecturePower ElectronicsLink GeneratorHardware SecurityDatapath GeneratorHigh-performance ArchitectureParallel ComputingPower-aware DesignElectrical EngineeringComputer EngineeringNetwork On ChipComputer ScienceMicroelectronicsLow-power ElectronicsSystem On ChipVlsi ArchitectureEdge ComputingSustained ScalabilityLow-swing Links
Networks-on-Chip (NoCs) are emerging as the answer to non-scalable buses for connecting multiple cores in Chip Multi Processors (CMPs), and multiple IP blocks in Multi Processor Systems-on-Chip (MPSoCs). These networks require an extremely low-power datapath to ensure sustained scalability, and higher performance/watt. Crossbars and links form the core of a network datapath, and integrating low-swing links within these will reduce power significantly. Low-swing links however require significant custom circuit design effort to deliver good power efficiency and high bit rate, in the face of noise. As a result, low-swing links have not been able to make it to mainstream chips which rely on crossbar and link generators from RTL. In this paper, we present a datapath generator that creates automated layouts for crossbars with noise-robust low-swing links within them. To the best of our knowledge, this is the first crossbar generator that (1) creates layouts, instead of generating just synthesizable RTL; and (2) integrates noise-robust low-swing links in an automated manner. We demonstrate our generated datapath in a fully-synthesized NoC router, and observe 50% power reduction on datapath.
| Year | Citations | |
|---|---|---|
Page 1
Page 1