Electrothermal performance limit of <i>β</i>-Ga2O3 field-effect transistors

TLDR

β‑Ga₂O₃ field‑effect transistors outperform GaN and GaN‑based FOMs but suffer from low thermal conductivity that causes severe self‑heating, necessitating a holistic material‑device‑circuit evaluation to assess their technological viability. The study develops a multiphysics, multiscale model to analyze β‑Ga₂O₃ FETs and assess how design strategies such as thermal shunts can mitigate self‑heating and enable performance comparison with GaN and SiC devices. The framework couples material, device, and circuit simulations to explore the effectiveness of design interventions—including wafer thinning, heat shunts, and mobility enhancement—in reducing thermal bottlenecks and improving β‑Ga₂O₃ FET performance. The authors find that conventional FOMs inadequately capture the performance of layered β‑Ga₂O₃ transistors and propose design strategies that could allow them to compete commercially with GaN and SiC technologies.

Abstract

A β-Ga2O3 field effect transistor (FET) outperforms a GaN FET in Baliga's figure of merit (FOM) by 400% and Huang's chip area manufacturing figure of merit by 330%, suggesting that β-Ga2O3 could be a substrate of choice for next generation power transistors. However, its low thermal conductivity leads to extreme self-heating, which deteriorates the device performance during high voltage operation. A holistic evaluation of performance from a material-device-circuit perspective is necessary before reaching any conclusion regarding the technological viability of β-Ga2O3. In this paper, we develop a multiphysics and multiscale model for a material-device-circuit analysis of β-Ga2O3 FETs. The framework allows us to explore the effectiveness of various device design strategies (e.g., thermal shunts) for mitigating the thermal chokepoints and compare the performance of improved β-Ga2O3 FETs against that of GaN and SiC FETs. We highlight the limitations of traditional FOMs to analyze the relative performance of the new generation of power transistors whose structure incorporates stacked layers of materials with different thermal conductivities, like those of β-Ga2O3 FETs. We suggest device design strategies, such as wafer thinning, incorporation of heat shunts, and improved channel mobility, so that β-Ga2O3 FETs can compete commercially with GaN and SiC technologies.