Wafer Defect Pattern Recognition and Analysis Based on Convolutional Neural Network

Abstract

Wafer map defect pattern contains the critical information about semiconductor manufacturing, effective defect analysis technology can improve the yield of products. This paper develops a wafer defect pattern recognition and analysis method based on convolutional neural network (CNN). We build an 8-layer CNN model to inspect wafer map defect and a 13-layer model to classify defect patterns. To analyze the defects, we first extract features based on the classification network, then perform PCA dimensionality reduction and similarity ranking, we infer the root causes of tested samples according to the retrieved wafer maps. In particular, we analyze the impacts of different network layers and feature dimensions on image retrieval performance, it turns out that the appropriate dimensionality reduction can increase the accuracy and speed of wafer map retrieval. The models are trained and tested on the WM-811K wafer map dataset, which are collected from real wafer maps. The experimental results show that the proposed method is able to identify common wafer defect patterns and analyze the root causes accurately and effectively.