A novel high-speed low-power dynamic comparator with complementary differential input in 65 nm CMOS technology

Design techniques for high-speed, high-resolution comparators

Behzad Razavi, B.A. Wooley · IEEE Journal of Solid-State Circuits · 1992 · 505 citations

Engineering, Electrical Engineering, Analog Electronics +16

Yield and speed optimization of a latch-type voltage sense amplifier

Bernhard Wicht, T. Nirschl, D. Schmitt‐Landsiedel · IEEE Journal of Solid-State Circuits · 2004 · 486 citations

Engineering, Computer Engineering, Electrical Engineering +17

Analysis and Design of a Low-Voltage Low-Power Double-Tail Comparator

Samaneh Babayan-Mashhadi, Reza Lotfi · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2013 · 477 citations

Engineering, Computer Engineering, Electrical Engineering +17

Kickback noise reduction techniques for CMOS latched comparators

Patrícia Figueiredo, J.C. Vital · IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing · 2006 · 347 citations

Engineering, Computer Engineering, Electrical Engineering +17

Analyses of Static and Dynamic Random Offset Voltages in Dynamic Comparators

Jun He, Sanyi Zhan, Degang Chen et al. · IEEE Transactions on Circuits and Systems I Regular Papers · 2009 · 200 citations

Engineering, Computer Engineering, Electrical Engineering +15