The VLDB Journal · 2019 · 10 citations · 22 references
ComputingComputer EngineeringComputer ScienceCompilersComputer ArchitectureParallel ComputingData ParallelismData-flow AnalysisHardware AccelerationParallel ArchitecturesParallel Computer ArchitectureQuery ProcessingControl Flow ControlData Parallel ExecutionHardware PipeliningParallel Query ProcessingSimd ArchitecturesSimd ExecutionVector ProcessingVector Processing Units
Increasing single instruction multiple data (SIMD) capabilities in modern hardware allows for the compilation of data-parallel query pipelines. This means GPU-alike challenges arise: control flow divergence causes the underutilization of vector-processing units. In this paper, we present efficient algorithms for the AVX-512 architecture to address this issue. These algorithms allow for the fine-grained assignment of new tuples to idle SIMD lanes. Furthermore, we present strategies for their integration with compiled query pipelines so that tuples are never evicted from registers. We evaluate our approach with three query types: (i) a table scan query based on TPC-H Query 1, that performs up to 34% faster when addressing underutilization, (ii) a hashjoin query, where we observe up to 25% higher performance, and (iii) an approximate geospatial join query, which shows performance improvements of up to 30%.
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Changkyu Kim, Tim Kaldewey, Victor W. Lee et al. · Proceedings of the VLDB Endowment · 2009 · 282 citations
Main-memory hash joins on multi-core CPUs: Tuning to the underlying hardware
Çagri Balkesen, Jens Teubner, Gustavo Alonso et al. · 2013 · 271 citations