High-Performance ZnO Thin-Film Transistors Prepared by Atomic Layer Deposition

Abstract

High-performance ZnO thin-film transistors (TFTs) have been successfully fabricated by atomic layer deposition (ALD) with a maximum temperature of 200 °C. The impacts of deposition and annealing temperature on the characteristics of devices were discussed. ZnO thin films show a (002) preferred orientation at the high growth temperature. The carrier concentrations of ZnO TFTs can be optimized by appropriate growth temperature and annealing treatments. Subthreshold swing (SS) and hysteresis windows of TFTs are improved after annealing in dry O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> due to the reduction in traps at ZnO/SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> interface or/and within the ZnO channel. The ZnO TFT deposited at 150 °C with 200 °C annealing in oxygen demonstrates excellent electrical characteristics with high saturation mobility μsat of 7.8 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> V <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> s <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> , small SS of 127 mV/decade, high I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> of 2.8 x 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">9</sup> , and good contact between source/drain electrodes. The high-performance ZnO TFTs with low processing temperatures have great potential in application for flexible electronics.