Design and Analysis of $D$ -Band On-Chip Modulator and Signal Source Based on Split-Ring Resonator

Yuan Liang, Chirn Chye Boon, Chenyang Li, Xiaolan Tang, Herman Jalli Ng, Dietmar Kissinger, Yong Wang, Qingfeng Zhang, Hao Yu

IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2019 · 37 citations · 37 references

DOIFull text

Open access

Concepts

Abstract

In an effort toward high-speed and low-power I/O data link in the future exascale data server, this paper presents a signal source and a modulator in the D-band. The split-ring resonator (SRR) structures are used to boost both the signal power and the extinction ratio (ER). The modulator manifests itself as a compact SRR whose magnetic resonance frequency can be modulated by high-speed data. Such a magnetic metamaterial achieves a significant reduction of radiation loss with high ER by stacking two auxiliary SRR unit cells with interleaved placement. The high-Q tank for oscillation is realized by a stacked SRR decorated with slow-wave transmission line (T-line) for electric field confinement. A four-way power-combined fundamental 80-GHz coupled-oscillator network is magnetically synchronized by the slow-wave T-line, which is frequency doubled to 160 GHz. Fabricated in the 65-nm CMOS process, the measured results show that: 1) the modulator achieves 3-dB insertion loss at the onstate with 43-dB isolation at the off-state, leading to a 40-dB ER at 125 GHz within an area of only 40 μm×67 μm and 2) the signal source achieves 6.3% frequency tuning range (FTR) with 3.7-mW peak output power at 160 GHz within 0.053-mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> active area. It has a measured phase noise of -105 dBc/Hz at 10-MHz offset, 5.5% dc-to-RF power efficiency, 70.1-mW/mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> power density, FOM of -171 dBc/Hz, and FOMT of -172.7 dBc/Hz.

References

37