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Hybrid III–V/Silicon Technology for Laser Integration on a 200-mm Fully CMOS-Compatible Silicon Photonics Platform
63
Citations
20
References
2019
Year
Optical MaterialsEngineeringDevice IntegrationIntegrated PhotonicsCmos Compatible MetallizationsOptoelectronic DevicesIntegrated CircuitsHybrid Iii–v/silicon TechnologySilicon On InsulatorWafer Scale ProcessingPhotonic Integrated CircuitPhotonicsElectrical EngineeringOptical InterconnectsMicroelectronicsPhotonic DeviceLaser IntegrationSilicon PhotonicsLaser Reference DesignsThree-dimensional Heterogeneous IntegrationApplied PhysicsOptoelectronics
In this paper, we present the hybrid III-V/Si photonic platform developed in CEA-LETI. The overall integration is done in a fully CMOS compatible 200-mm technology, scalable to 300-mm wafers, leveraging the large-scale integration capabilities of silicon photonics. III-V material is integrated on top of a mature silicon photonic front-end wafer through direct molecular bonding enabling the monolithic integration of light sources. DFB and distributed Bragg reflector (DBR) laser reference designs are used as test vehicles for the process validation. A modular approach is used in order to minimize the impact on the already qualified silicon-based devices. Collective III-V die bonding is proposed in this platform. CMOS compatible metallizations are used to form ohmic contact on n-InP and P-InGaAs leading to contact resistivity in the range of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-6</sup> Ω·cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . A planarized two-metal-level BEOL is used to connect the device, leading to a drastic reduction of series resistance. Finally, the functionality of both types of lasers is demonstrated with SMSR up to 50 dB and maximum output power of 5 mW.
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