Mixed-Signal Neuromorphic Inference Accelerators: Recent Results and Future Prospects

Abstract

Recent advances in dense, continuous-state nonvolatile memories have enabled extremely fast, compact, and energy-efficient analog and mixed-signal circuits. Such circuits are perfectly suited, in particular, for hardware implementations of the inference operation in advanced neuromorphic networks, which requires massive amounts of dot-product operations with low-to-medium precision. In this paper, we first review typical implementations of such mixed-signal circuits. We then describe some recent experimental demonstrations of prototype mixed-signal neuromorphic networks by our team, in particular, a mixed-signal inference accelerator with unprecedented speed and energy efficiency. The paper is concluded by outlining some urgently needed work, in particular the development of high-performance general-purpose inference accelerators, and discussing our preliminary results in this direction.