A cost-efficient 28nm split-gate eFLASH memory featuring a HKMG hybrid bit cell and HV device

Abstract

We demonstrate for the first time the integration of the proven SuperFlash <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">®</sup> bit cell into 28nm High-K Metal Gate (HKMG) technology, incorporating logic HKMG into the flash cell. Flash cell and high-voltage (HV) devices are implemented into a cost-optimized process flow saving seven masks compared to other 28nm eFLASH technologies. Comparable program/erase (P/E) endurance of up to one million cycles at 125°C is shown and program disturb characteristics meets array operation requirements. The Wordline transistor exhibits no degradation in sub-threshold slope of the post 100k P/E cycling, demonstrating robust reliability despite the introduction of HKMG into the flash cell. Additionally, the HKMG based HV devices demonstrate performance similar to platforms without HKMG material.