Publication | Open Access
Steep Slope p-type 2D WSe<inf>2</inf> Field-Effect Transistors with Van Der Waals Contact and Negative Capacitance
27
Citations
7
References
2018
Year
Unknown Venue
SemiconductorsDevice ModelingElectrical EngineeringSemiconductor TechnologyEngineeringElectronic MaterialsPhysicsField-effect TransistorsSemiconductor DeviceElectronic EngineeringApplied PhysicsQuantum MaterialsNegative CapacitanceSteep-slope P-type 2DDielectric LayerFermi Level Pinning
Steep-slope p-type 2D WSe <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> back-gated field-effect transistors (FETs) are realized by using van der Waals Pt-WSe <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> contact and HfZrO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> / Al <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> O <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf> as the dielectric layer. The van der Waals Pt-WSe <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> contact is free from disorder and Fermi level pinning and decreases the subthreshold slope. The WSe <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> NCFET with van der Waals contact shows low subthreshold slope for both forward and reverse gate voltage sweep (the minimum <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{SS}_{\text{forward}}=18.2\ \text{mV}/\text{dec}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{SS}_{\text{reverse}}=44.1\ \text{mV}/\text{dec}$</tex> ) with a hysteresis as small as 20 mV at subthreshold region.
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