2019 · 13 citations · 12 references
ComputingComputer EngineeringComputer ScienceComputer ArchitectureEmbedded SystemsMachine LearningAccelerator ArchitectureData Locality OptimizationData Movement OptimizationDeep LearningHardware AccelerationMemory Hierarchy OptimizationAcceleratorsData ReuseDeep Learning AcceleratorsEnergyEnergy ConsumptionHybrid Memory ArchitecturesPower-efficient Accelerator DesignVon Neumann Architecture
In Deep Neural Network (DNN) applications, energy consumption and performance cost of moving data between memory hierarchy and computational units are significantly higher than that of the computation itself. Process-in-memory (PIM) architecture such as Hybrid Memory Cube (HMC), becomes an excellent candidate to improve the data locality for efficient DNN execution. However, it's still hard to efficiently deploy large-scale matrix computation in DNN on HMC because of its coarse grained packet protocol. In this work, we propose NeuralHMC, the first HMC-based accelerator tailored for efficient DNN execution. Experimental results show that NeuralHMC reduces the data movement by 1.4x to 2.5x (depending on the DNN data reuse strategy) compared to Von Neumann architecture. Furthermore, compared to state-of-the-art PIM-based DNN accelerator, NeuralHMC can promisingly improve the system performance by 4.1x and reduces energy by 1.5x, on average.
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