IEEE Transactions on Circuits & Systems II Express Briefs · 2017 · 37 citations · 12 references
EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyCurrent MirrorsSubthreshold Circuit DesignTransistor BiasingVoltage RegulatorsCmos Current MirrorsLine RegulationLow-power Cmos DesignPower ConsumptionTemperature CompensationVoltage Reference CircuitsVoltage Reference DesignVoltage References
A novel 79-nW CMOS-only subthreshold voltage reference with 328-mV output voltage, which works down to 0.8-V supply voltage, is presented in this brief. In order to reduce the area and power consumption, the proposed circuit avoids the use of resistors and bipolar transistors. A current subtracting technique is proposed to realize the temperature compensation of reference current. Instead of the op-amp in traditional circuits, some cascode current mirrors are used to enhance the power supply rejection ratio (PSRR). A novel structure consisting of a 1.8-V MOS transistor and a 3.3-V MOS transistor is utilized to accomplish the voltage temperature compensation and to further reduce the power consumption of VREF generator. The proposed voltage reference was fabricated in 0.18-μm CMOS process. The measured results show that the temperature coefficient of the output voltage is 33.8 ppm/°C in the range from 10 °C to 100 °C, the PSRR is -55 dB @ 100 Hz at 1.2-V power supply, and the line regulation is 0.21%/V in a supply voltage range of 0.8 to 3.4 V. What is more, the power dissipation is 79 nW, and the chip area is 0.01 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . It is suitable for low-power applications.
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Analysis and Design of Analog Integrated Circuits
W.R. Betts · Electronics and Power · 1978 · 3.8K citations