Formal-Based Design and Verification of SoC Arbitration Protocols: A Comparative Analysis of TDMA and Round-Robin

Abstract

As System-On-Chips (SoCs) Are increasing in size and complexity, their validation and verification have become important and more difficult to achieve. Currently, the most widely used SoC design is typically bus based and consists of shared communication resources managed by dedicated arbiters that are in charge of serializing access requests. That is why the communication architecture as well as arbiters design are the backbone of the SoC design and have a large effect on its quality both in terms of performance and reliability. Assuming bus-based communication architecture, several well-known arbitration policies have been proposed, such as TDMA [1] and round-robin [2] which are considered as the most widely used scheduling policies in SoC design.