Standby and dynamic power minimization using enhanced hybrid power gating structure for deep-submicron CMOS VLSI

1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS

S. Mutoh, T. Douseki, Y. Matsuya et al. · IEEE Journal of Solid-State Circuits · 1995 · 1.1K citations

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Low-power digital systems based on adiabatic-switching principles

W.C. Athas, Lars Svensson, J.G. Koller et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1994 · 581 citations

Engineering, Computer Engineering, Electrical Engineering +17

Performance analysis of low-power 1-bit CMOS full adder cells

A.M. Shams, T. Darwish, Magdy Bayoumi · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2002 · 494 citations

Engineering, Computer Engineering, Electrical Engineering +17

A 0.9-V, 150-MHz, 10-mW, 4 mm/sup 2/, 2-D discrete cosine transform core processor with variable threshold-voltage (VT) scheme

Tadahiro Kuroda, Takeshi Fujita, S. Mita et al. · IEEE Journal of Solid-State Circuits · 1996 · 473 citations

Engineering, Computer Engineering, Electrical Engineering +17

Design of Robust, Energy-Efficient Full Adders for Deep-Submicrometer Design Using Hybrid-CMOS Logic Style

Sumeer Goel, Ashok Kumar, Magdy Bayoumi · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2006 · 447 citations

Engineering, Computer Engineering, Electrical Engineering +17