IEEE Magnetics Letters · 2016 · 50 citations · 11 references
EngineeringComputer EngineeringElectrical EngineeringElectronic MaterialsMicroelectronicsSemiconductor DevicesDevice ModelingDevice ReliabilityDevice SimulationMetal-oxide-semiconductor Field-effect TransistorsTiming AnalysisComplementary Metal-oxide-semiconductor DevicesError Rate AnalysisError Rate MetricsMagnetic Tunnel JunctionsMagnetoresistive Random-access MemoryMemory Device SimulationRandom-access MemoryTunnel Junctions
We report experimental results on write error rate and read disturbance as a function of read/write pulse width and amplitude in electric-field-controlled magnetic tunnel junctions (MTJs). Results are shown for 50 nm perpendicular MTJs. We also design and simulate the performance of a 256 kilobit (Kbit) magneto-electric random-access memory (MeRAM) macro in a 28 nm complementary metal-oxide semiconductor (CMOS) process, based on the measured MTJ device data. The results show that existing electric-field-controlled MTJs are capable of delivering write error rates below <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$10^{{-9}}$</tex-math></inline-formula> for 10 ns total write and verify time and read disturbance below <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$10^{{-16}}$</tex-math> </inline-formula> for 2 ns read time in a 256 Kbit MeRAM array.
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Yoichi Shiota, Takayuki Nozaki, Shingo Tamaru et al. · Applied Physics Express · 2015 · 102 citations
Natural Sciences, Electrical Engineering, Materials Science +17