A dynamic threshold voltage MOSFET (DTMOS) for ultra-low voltage operation

Abstract

To extend the lower bound of power supply to ultra-low voltages (0.6 V and below), we propose a dynamic-threshold voltage MOSFET (DTMOS) built on silicon-on-insulator (SOI). The threshold voltage of DTMOS drops as the gate voltage is raised, resulting in a much higher current drive than standard MOSFET at low power supply voltages. On the other hand, V/sub t/ is high at V/sub gs/=0, therefore the leakage current is low. We provide experimental results and 2-D device and mixed-mode simulations to analyze DTMOS and compare its performance with a standard MOSFET. These results verify excellent DC inverter characteristics down to V/sub dd/=0.2 V, and good ring oscillator performance down to 0.3 V for DTMOS.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>