A 65nm NOR flash technology with 0.042μm/sup 2/ cell size for high performance multilevel application

Abstract

A 65nm NOR flash technology, featuring a true 10lambda <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2 </sup> , 0.042mum <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> cell, is presented for the first time for 1bit/cell and 2bit/cell products. Advanced 193nm lithography, floating gate self aligned STI, cobalt salicide and three levels of copper metallization allow the integration with a high density and high performance 1.8V CMOS