Publication | Closed Access
The ballistic nanotransistor: a simulation study
96
Citations
3
References
2002
Year
Unknown Venue
EngineeringBallistic NanotransistorSemiconductor DeviceNanoelectronicsNanoscale ModelingBallistic Double-gatePhysics IssuesDevice ModelingElectrical EngineeringNanoscale SystemPhysicsNanotechnologyDevice DesignSemiconductor Device FabricationMicroelectronicsNanomaterialsApplied PhysicsNano Electro Mechanical SystemBeyond Cmos
The device design and physics issues of ballistic double-gate (DG) MOSFETs are explored using semiclassical and quantum simulations. We find that tunneling from source-to-drain increases the off-current but decreases the on-current for an L=10 nm model transistor. We also show that source-to-drain tunneling sets a scaling limit at less than about L=10 nm, but to achieve this limit, ultra-thin bodies are necessary to control classical two-dimensional short-channel effects. Finally, we show that to meet performance targets at low voltages, near-ballistic performance is necessary, and we estimate the mobility that will be required for these ultra-thin silicon films.
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