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Four-layer 3D vertical RRAM integrated with FinFET as a versatile computing unit for brain-inspired cognitive information processing
69
Citations
6
References
2016
Year
Unknown Venue
EngineeringEmerging Memory TechnologyIntegrated CircuitsNeurochipSocial Sciences3D MemoryMemory DeviceNeuromorphic EngineeringCognitive NeuroscienceFour-layer 3DNeurocomputersElectrical EngineeringCognitive ScienceElectronic MemoryComputer EngineeringRram CellsFinfet SelectorMicroelectronicsComputational NeuroscienceApplied PhysicsVertical RramNeuroscienceSemiconductor Memory3D Integration
For the first time, a four-layer HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> -based 3D vertical RRAM, the “tallest” one ever reported, is developed and integrated with FinFET selector. Uniform memory performance across four layers is obtained (±0.8V switching, 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sup> endurance, 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> s@125°C). SPICE simulations show that high drive current of pillar select transistors is required for high-rise 3D RRAM arrays. The four-layer 3D RRAM is a versatile computing unit for (a) brain-inspired computing and (b) in-memory computing. (a) Stochastic RRAM synapses enable robust pattern learning for a 3D neuromorphic visual system. The 3D architecture with dense and balanced neuron-synapse connections provides 55% EDP savings and 74% V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DD</sub> reduction (enhanced robustness) compared with conventional 2D architecture; (b) in-memory logic such as NAND, NOR, and bit shift, are essential elements for hyper-dimensional computing. Utilizing the unique vertical connection of 3D RRAM cells, these operations are performed with little data movement.
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