Publication | Closed Access
Low-Power Scan-Based Built-In Self-Test Based on Weighted Pseudorandom Test Pattern Generation and Reseeding
72
Citations
52
References
2016
Year
Lp Bist ApproachElectrical EngineeringEngineeringHardware-in-the-loop SimulationTesting TechniqueSoftware TestingMem TestingComputer EngineeringTest Data GenerationBuilt-in Self-testNew Low-powerTest BenchDesign For TestingDeterministic Bist
A new low-power (LP) scan-based built-in self-test (BIST) technique is proposed based on weighted pseudorandom test pattern generation and reseeding. A new LP scan architecture is proposed, which supports both pseudorandom testing and deterministic BIST. During the pseudorandom testing phase, an LP weighted random test pattern generation scheme is proposed by disabling a part of scan chains. During the deterministic BIST phase, the design-for-testability architecture is modified slightly while the linear-feedback shift register is kept short. In both the cases, only a small number of scan chains are activated in a single cycle. Sufficient experimental results are presented to demonstrate the performance of the proposed LP BIST approach.
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