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2-D Threshold Voltage Model for the Double-Gate p-n-p-n TFET With Localized Charges
29
Citations
29
References
2016
Year
Device ModelingElectrical EngineeringDouble-gate P-n-p-n TfetEngineeringPhysicsNanoelectronicsElectronic EngineeringSurface ScienceApplied PhysicsLocalized ChargesSurface PotentialStress-induced Leakage CurrentBias Temperature InstabilityMinimum Tunneling WidthMicroelectronicsSemiconductor Device
In this paper, for the first time, we developed an analytical model for the surface potential of the double-gate p-n-p-n tunneling field-effect transistors (TFETs) considering the effect of localized charges at the Si-SiO2 interface near the source-channel junction. From the surface potential model, the minimum tunneling width is then evaluated and is used to extract the threshold voltage using the constant-current method. The model can be applied to study the effect of localized charges on the threshold voltage of the p-n-p-n TFETs as it captures the shift in the threshold voltage due to the change in the localized charge region length, localized charge density, and polarity. The accuracy of the proposed model is verified using 2-D Technology Computer-Aided Design simulations.
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