Negative Quantum Capacitance Effects in Metal–Insulator–Semiconductor Devices with Composite Graphene‐Encapsulated Gates

Abstract

Metal–insulator–semiconductor devices with composite graphene-encapsulated gates are grown on p- and n-Si substrates. Capacitance–voltage (C–V) measurements indicate a capacitance peak enhancement above the geometrical one in accumulation region. Such enhancement is attributed to negative capacitance contribution of graphene which is due to electron correlation effects. Experimental C–V data are in good agreement with theoretical results. As a service to our authors and readers, this journal provides supporting information supplied by the authors. Such materials are peer reviewed and may be re-organized for online delivery, but are not copy-edited or typeset. Technical support issues arising from supporting information (other than missing files) should be addressed to the authors. Please note: The publisher is not responsible for the content or functionality of any supporting information supplied by the authors. Any queries (other than missing content) should be directed to the corresponding author for the article.