Performance Improvement of Atomic Layer-Deposited ZnO/Al₂O₃Thin-Film Transistors by Low-Temperature Annealing in Air

Abstract

High-performance thin-film transistors (TFTs) with atomic layer-deposited (ALD) ZnO channel/Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> dielectric were fabricated under a maximum processing temperature of 200 °C. The effects of postannealing temperature and time on the performance of the TFT were investigated. Under annealing at 200 °C in air, the performance of the TFT was greatly improved by increasing the annealing time to 120 min, showing a very low OFF-current of 2.98 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-13</sup> A, a small subthreshold swing (SS) of 244 mV/decade, a quite large I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ratio of 4 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">8</sup> , and a high field-effect electron mobility of 21.9 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> /V·s. Furthermore, good electrical stabilities were also demonstrated under gate-bias stress, such as a threshold voltage shift (ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> ) of -1.1 V and a Δ SS of 86 mV/decade under -20 V for 3000 s, a ΔV <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> of 0.29 V, and a Δ SS of -44 mV/decade under +20 V for 3000 s. The above results are attributed to the gradual passivation of oxygen vacancies in the ZnO channel and interface traps at the interface of ZnO/Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> with an increment of annealing time. Thus, the current ZnO TFT with a low thermal budget and high performance is very promising for flexible electronic applications.