ComputingComputer EngineeringComputer ScienceCompilersComputer ArchitectureFormal MethodsDeductive VerificationEquivalence CheckingHardware Modeling For Digital SystemsVerificationCorrectness CheckingFormal Hardware VerificationHardware Equivalence CheckingHardware VerificationSystem-level VerificationVery-large-scale Integration
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Temporal logic can be more expressive
Pierre Wolper · 1981 · 147 citations
A Digital System Design Language (DDL)
J.R. Duley, D.L. Dietmeyer · IEEE Transactions on Computers · 1968 · 110 citations
Formal Design Verification of Digital Systems
A.S. Wojcik · Design Automation Conference · 1983 · 33 citations