Further Study of the U-Shaped Channel SOI-LIGBT With Enhanced Current Density for High-Voltage Monolithic ICs

Abstract

A high-voltage silicon-on-insulator lateral insulated-gate bipolar transistor (SOI-LIGBT) with U-shaped channels, which are composed of parallel channels and orthogonal channels for improving the current density (J <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</sub> ) and latch-up immunity, is proposed and studied intensively in this paper. By using the U-shaped channels, the electron injection from the emitter into the n-drift region is significantly enhanced, and the current density is improved. In addition, an analytical model is proposed, and it is indicated that J <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</sub> can be improved as α (the angle between the parallel channel and the orthogonal channel) increases in a certain range. The hole current density distribution in the ON-state and the lattice temperature distribution in the short-circuit state of the proposed structure are also investigated. Increasing α is beneficial to alleviate the holes crowding beneath the n <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> emitter and suppress the temperature rise in the JFET region, which is favorable for increasing the latch-up voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LP</sub> ) and short-circuit withstand time (t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SC</sub> ). The experiments demonstrate that the U-shaped channel SOI-LIGBT fabricated with 0.5-μm SOI technology exhibits a high current density (J <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</sub> ) of 305 A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> at V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE</sub> = 3 V and V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GE</sub> = 5 V, and a low specific ON-resistance (R <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON· sp</sub> ) of 0.984 Ω · mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with breakdown voltage of 590 V. The improved latch-up voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">LP</sub> ) of 560 V and the short-circuit withstand time (t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SC</sub> ) of 5.1 μs are obtained.