Design and Implementation of I2c master controller on FPGA using VHDL

Abstract

The focus of this paper is on I2C protocol following master controller. This controller is connected to a microprocessor or computer and reads 8 bit instructions following I2C protocol. The instructions are then processed and converted to instructions which follow SPI protocol. 32 bit register is designed to send data serially as per SPI instructions. The complete module is designed in VHDL and simulated in ModelSIM. The design is also synthesized in Xilinx XST 12.1 and optimized for area and power. This concept is widely applicable where a microprocessor wants to communicate with SPI device. This module acts as a slave for the microprocessor at the same time acts like a master for the SPI device which can be considered as a slave. This design is customized for slowing the data rate according to SPI device, which assures no data loss.