A Novel "SMAFTI" Package for Inter-Chip Wide-Band Data Transfer

Abstract

A package structure with inter-chip connection is proposed for broadband data transfer and low latency electrical communication between a high-capacity memory and a logic device interconnected by a feedthrough interposer (FTI) featuring a fine-wiring pattern and ultra-fine-pitch through vias. The FTI is formed on a silicon wafer using a photolithography process to realize fine vias and fine wiring patterns. This structure enables over a thousand inter-chip connections and a high pin count in the logic device. This paper describes the concept, structure, process, and experimental results of prototypes of this package called SMAFTI (SMArt chip connection with FeedThrough Interposer). This paper also reports the results of intermetallic compound analysis and thermal cycle test (TCT) that were performed to confirm the fundamental reliability of this novel inter-chip connection structure