Measurements and analyses of substrate noise waveform in mixed-signal IC environment

TLDR

The study introduces a controllable substrate noise source to generate substrate noises with adjustable size, delay, and direction for experimental investigation of substrate noise in mixed‑signal ICs. The authors fabricated a 0.1‑µm P‑substrate N‑well CMOS noise source and measured 100‑ps resolution noise using indirect threshold‑shift sensing in a latch comparator and direct probing with a PMOS source follower. Measurements reveal that peaks at logic transition frequencies have time constants more than ten times the switching time, and equivalent‑circuit analysis shows that charge transfer through parasitic capacitance and supply impedance dominates, producing return‑bounce substrate noise.

Abstract

A transition-controllable noise source is developed in a 0.1-/spl mu/m P-substrate N-well CMOS technology. This noise source can generate substrate noises with controlled transitions in size, interstage delay and direction for experimental studies on substrate noise properties in a mixed-signal integrated circuit environment. Substrate noise measurements of 100 ps, 100-/spl mu/s resolution are performed by indirect sensing that uses the threshold voltage shift in a latch comparator and by direct probing that uses a PMOS source follower. Measured waveforms indicate that peaks reflecting logic transition frequencies have a time constant that is more than ten times larger than the switching time. Analyses with equivalent circuits confirm that charge transfer between the entire parasitic capacitance in digital circuits and an external supply through parasitic impedance to supply/return paths dominates the process, and the resultant return bounce appears as the substrate noise.