Takashi Morie - Concepedia

Author

Takashi Morie

Kyushu Institute of Technology ORCID

Also Known As

Abe, Yushi, Morie Takashi, Morie, Takashi, Nakahara, Kazuo, T Morie, T. MORIE, T. Morie, Takashi MORIE, Takashi Morie

300

Publications

2.2K

Citations

H-Index

Concepts

All Affiliations

Kyushu Institute of Technology Hiroshima University Panasonic (Japan)The University of Tokyo NTT (Japan)

About

Takashi Morie is an author at Kyushu Institute of Technology specializing in engineering, computer engineering, and electrical engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	19	42	1.3K
2	Social Sciences	7	7	444
3	Applied Physics	6	6	305
4	Health Sciences	1	1	10
5	Biomedical Engineering	1	1	21

Takashi Morie

Publications

1.6K

Citations

H-Index

Page 1

	Year	Citations
Three-terminal ferroelectric synapse device with concurrent learning function for artificial neural networks Yu Nishitani, Yukihiro Kaneko, Motoki Ueda, Journal of Applied Physics EngineeringGate VoltageNeurochipSocial SciencesNanoelectronics	2012	206
The architecture of delta sigma analog-to-digital converters using a voltage-controlled oscillator as a multibit quantizer Akira Iwata, Noboru Sakimura, Makoto Nagata, IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing Analog System EngineeringMultibit QuantizerData Converterδ-σ AdcVoltage-controlled Oscillator	1999	107
An all-analog expandable neural network LSI with on-chip backpropagation learning Takashi Morie, Yoshiyuki Amemiya IEEE Journal of Solid-State Circuits EngineeringMachine LearningNeural Networks (Machine Learning)Analog Neural LsiAnalog Design	1994	105
A 4.2 mW 50 MS/s 13 bit CMOS SAR ADC With SNR and SFDR Enhancement Techniques Takuji Miki, Takashi Morie, Kazuo Matsukawa, IEEE Journal of Solid-State Circuits Sar AdcDb SfdrData ConverterMs/s 13Analog Design	2015	84
Physical design guides for substrate noise reduction in CMOS digital circuits Makoto Nagata, J. Nagai, Kunio HIJIKATA, IEEE Journal of Solid-State Circuits Electrical EngineeringEngineeringVlsi DesignSubstrate Noise ReductionCircuit System	2001	80
Measurements and analyses of substrate noise waveform in mixed-signal IC environment Makoto Nagata, J. Nagai, Takashi Morie, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems EngineeringVlsi DesignSubstrate Noise WaveformAnalog DesignTransition-controllable Noise Source	2000	74
A 71dB-SNDR 50MS/s 4.2mW CMOS SAR ADC by SNR enhancement techniques utilizing noise Takashi Morie, Takuji Miki, Kazuo Matsukawa, Electrical EngineeringEngineeringCmos Sar AdcData ConverterMixed-signal Integrated Circuit	2013	68
A CMOS Spiking Neural Network Circuit with Symmetric/Asymmetric STDP Function Hideki Tanaka, Takashi Morie, Kazuyuki Aihara IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences EngineeringCircuit NeuroscienceSynaptic TransmissionAnalog Cmos CircuitNeurochip	2009	62
An ultra-low-power 2-step wake-up receiver for IEEE 802.15.4g wireless sensor networks Takayuki Abe, Takashi Morie, Kazutoshi Satou, Low-power ElectronicsWireless CommunicationsElectrical EngineeringEnergy HarvestingEngineering	2014	42
Self-feedback electrically coupled spin-Hall oscillator array for pattern-matching operation Kiwamu Kudo, Takashi Morie Applied Physics Express MagnetismSpintronicsSpin-hall Oscillator ArrayEngineeringOscillator Array	2017	41

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