Publication | Closed Access
Physical compact modeling and analysis of velocity overshoot in extremely scaled CMOS devices and circuits
55
Citations
20
References
2001
Year
Device ModelingElectrical EngineeringSemiconductor DeviceEngineeringVlsi DesignVelocity OvershootCircuit SystemNanoelectronicsBias Temperature InstabilityApplied PhysicsComputer EngineeringCircuit SimulationPhysical Compact ModelingPerformance ProjectionsCmos DevicesMicroelectronicsBeyond CmosBallistic Limits
A compact physics-based velocity-overshoot model is developed, implemented in metal oxide semiconductor field-effect transistor (MOSFET) circuit models, verified based on measured current-voltage data and Monte Carlo-simulation results, and demonstrated in performance projections for 25 nm bulk-Si complementary metal-oxide-semiconductor (CMOS). The demonstration, involving predicted current-voltage characteristics and ring-oscillator propagation delays, reveals a significant benefit of velocity overshoot, or quasi-ballistic transport, in extremely scaled nMOS and even pMOS devices, although the on-state currents are well below the ballistic limits. Physical insight afforded by the model reveals why the ballistic limits are not being reached in scaled bulk-Si CMOS technologies.
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