Transistor design issues in integrating analog functions with high performance digital CMOS

Abstract

Pocket or halo designs used in high performance digital CMOS design can degrade analog device performance. A new understanding of this phenomenon is presented using device simulation. The effect of pocket implant parameters on the trade-off between digital and analog performance is studied experimentally. Experimental data showing the beneficial effects of eliminating the pocket selectively from the drain end on analog performance is also shown.