2013 · 10 citations · 4 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignSystem-on-chip DesignAnalog Integrated CircuitsCmos Circuit DesignDigital Integrated Circuit DesignDigital Integrated CircuitsLow-power Digital Circuit DesignPower OptimizationAnalog-digital ConversionAnalog-to-digital ConversionAnalog-to-digital ConvertersCmos Logic CircuitsDynamic Cmos LogicLow-power Cmos DesignPower ConsumptionThermometer Encoding
This investigation suggests a low power encoding scheme proposed for 4GS/s 5 bit flash analog to digital converter. One of the demanding issues in the design of a low power flash ADC is the design of thermometer code to binary code. An encoder in this paper converts the thermometer code into binary code without any intermediate stage. To decrease the power consumption of the encoder, the implementation is done using dynamic CMOS logic. The proposed encoder is designed using 90 nm technology at 1.2 V power supply using CADENCE tool. The simulation results shown for a sampling frequency of 4GHz and the average power dissipation of the encoder is 1.833 μW.
4
A 3.5 GS/s 5-b Flash ADC in 90 nm CMOS
Sunghyun Park, Yorgos Palaskas, Ashoke Ravi et al. · 2006 · 50 citations
Engineering, Computer Engineering, Electrical Engineering +17