Design methodology of high performance microprocessor using ultra-low threshold voltage CMOS

Abstract

A new design methodology of high performance CMOS MPU that applies ultra-low VTH, which is necessary to improve circuit performance with low power supply voltage, is discussed. The multi-V/sub TH/, the IDDQ measurement with back bias control at low temperature and IDDQ technologies are applied in order to speed up, without increasing background leakage, IDDQ test. As a result, operation frequency of 64 bit MPU was successfully improved 340 MHz to 560 MHz without lowering IDDQ quality.