Publication | Closed Access
Applications of multi-valued logic to testing of binary and MVL circuits
13
Citations
5
References
1987
Year
EngineeringMulti-valued LogicMem TestingVerificationComputer ArchitectureModel CheckingFormal VerificationMvl CircuitsSystems EngineeringAbstract BinaryFeedback Shift RegistersComputer EngineeringBuilt-in Self-testComputer ScienceSignal ProcessingDesign For TestingLogic SynthesisCircuit DesignAutomated ReasoningSoftware TestingFormal MethodsData CompactionDigital Circuit DesignFunctional Verification
Abstract Binary linear feedback shift registers (LFSR's) have acquired great importance in their implementation of a method of data compaction used in the testing of digital circuits. In this paper a new idea is examined: using multiple-valued LFSR's for the testing of MVL circuits and of binary circuits. For MVL circuits a non-binary LFSR avoids the need of decoding the signals and its implementation requires fewer digits than the binary tester. For binary circuits, a multi-valued LFSR tester shows higher effectiveness while maintaining a smaller implementation. An analysis is given of fault coverage for binary and multi-valued circuits, and optimal implementations of multi-valued LFSR's are presented.
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