IEEE Transactions on Image Processing · 2003 · 137 citations · 21 references
EngineeringComputer EngineeringComputer ScienceCompilersComputer ArchitectureField-programmable Gate ArraysAccelerator ArchitectureField-programmable Gate Array ArchitectureFpga ArchitectureFpga Programming ModelsHardware AccelerationC-based Fpga ProgrammingCompilation For Reconfigurable HardwareEmbedded Image Processing AccelerationField-programmable Gate Array AccelerationField-programmable Gate Arrays (Fpgas)Image Processing AcceleratorsReconfigurable Image Processing Systems
The Cameron project has developed a language called single assignment C (SA-C), and a compiler for mapping image-based applications written in SA-C to field programmable gate arrays (FPGAs). The paper tests this technology by implementing several applications in SA-C and compiling them to an Annapolis Microsystems (AMS) WildStar board with a Xilinx XV2000E FPGA. The performance of these applications on the FPGA is compared to the performance of the same applications written in assembly code or C for an 800 MHz Pentium III. (Although no comparison across processors is perfect, these chips were the first of their respective classes fabricated at 0.18 microns, and are therefore of comparable ages.) We find that applications written in SA-C and compiled to FPGAs are between 8 and 800 times faster than the equivalent program run on the Pentium III.
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The density advantage of configurable computing
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