A 1/1.8-inch 6.4MPixel 60 frames/s CMOS Image Sensor with Seamless Mode Change

Abstract

A1/1.8-inch 6.4Mpixel 60frames/s CMOS image sensor fabricated in a 0.18μm 1P3M process is described. A zigzag-shaped 1.75T/pixel architecture and a 10b counter-type column parallel ADC enables 2.5times2.5mum <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> pixels. The resulting pixel has 38% fill factor, 12ke-/lux-s, and random noise of 7e- <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> . A 10b parallel LVDS interface enables data rates of up to 4.32Gb/s with 216MHz DDR. Full frame and 2X2 binning modes are interchangeable without an extra invalid frame