2003 · 18 citations · 6 references
EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsSemiconductor DevicesCmos Circuit DesignHigh-frequency Semiconductor DevicesIntegrated Circuit DesignLow-noise Circuit DesignMicrowave Integrated CircuitsRadio-frequency Integrated CircuitsCmos Analog Integrated CircuitsCmos OscillatorsCmos Radio-frequency CircuitsLow-power Cmos DesignLow-voltage Cmos DesignPhase NoiseTuningTuning Range
A low-voltage 3.0-5.6 GHz VCO was designed and fabricated in an 0.13 /spl mu/m SOI CMOS process. This VCO features a single-loop horseshoe-shaped inductor and an array of band-switching accumulation MOS (AMOS) varactors. This results in good phase noise and a wide tuning range of 58.7% when tuned between 0 to 1.4 V. At a 1 V Supply (V/sub DD/) and 1 MHz offset, the phase noise is -120 dBc/Hz at 3.0 GHz, and -114.5 dBc/Hz at 5.6 GHz. The power dissipation is between 2 and 3 mW across the whole tuning range. The buffered output power is -7 dBm. When VDD is reduced to 0.83 V, the VCO dissipates less than 1 mW at 5.6 GHz.
6
A 0.13-μm SOI CMOS technology for low-power digital and RF applications
N. Zamdmer, A. Ray, Jean‐Olivier Plouchart et al. · 2002 · 40 citations
Engineering, Computer Engineering, Electrical Engineering +17