Graphene-based lateral heterostructure transistors exhibit better intrinsic performance than graphene-based vertical transistors as post-CMOS devices

Abstract

We investigate the intrinsic performance of vertical and lateral graphene-based heterostructure field-effect transistors, currently considered the most promising options to exploit graphene properties in post-CMOS electronics. We focus on three recently proposed graphene-based transistors, that in experiments have exhibited large current modulation. Our analysis is based on device simulations including the self-consistent solution of the electrostatic and transport equations within the Non-Equilibrium Green's Function formalism. We show that the lateral heterostructure transistor has the potential to outperform CMOS technology and to meet the requirements of the International Technology Roadmap for Semiconductors for the next generation of semiconductor integrated circuits. On the other hand, we find that vertical heterostructure transistors miss these performance targets by several orders of magnitude, both in terms of switching frequency and delay time, due to large intrinsic capacitances, and unavoidable current/capacitance tradeoffs.