Instruction scheduling for the IBM RISC System/6000 processor

H. Shaw Warren

IBM Journal of Research and Development · 1990 · 102 citations · 8 references

Concepts

Abstract

For fast execution on the IBM RISC System/6000* processor, instructions should be arranged in an order that uses the arithmetic units as efficiently as possible. This paper describes the scheduling requirements of the machine, and a scheduling algorithm for it that is used in two compilers.

References

8